The present invention relates to wireless communications devices and, in particular, relates to mixer circuits on integrated circuits that are used to convert between radio frequency (RF) signals and intermediate frequency (IF) signals in the wireless communications devices.
Wireless communications devices are ubiquitous in modern life. In recent times, there has been an explosion in the usage of cellular telephones and other types of remote communications devices, as well as increasing usage of wireless communications devices in other applications, including automotive applications. One of the reasons for the recent explosion in the use of wireless communications devices has been the significant improvements in integrated circuit technologies, which have allowed the electronics necessary for wireless communications devices to be significantly reduced in size and price. For example, cellular telephones have become practical in large part because the reduction in size of the electrical components has allowed manufacturers to design smaller, more convenient handsets. Further reduction in the size and cost of the electrical components of wireless communications devices remains an imperative for the manufacturers of the wireless communications devices. In particular, the replacement of circuit elements that are not implementable on an integrated circuit with circuit elements that can be implemented on an integrated circuit remains an important goal.
A key component of the typical wireless communications device is the mixer circuit, which allows for frequency conversion between the radio frequency (RF) or even microwave signals received by the wireless communications device, which travel through the atmosphere, and intermediate frequency (IF) signals which are processed by the wireless communications device. The process of converting RF signals into IF signals is critical for isolating the information carried on a desired RF signal from all of the other information received by the wireless device which is carried on other RF signals. A conventional mixer circuit converts a RF signal into an IF signal by multiplying the RF signal by a local oscillator (LO) signal provided by a LO circuit. Because several signals including the desired IF signal are typically produced by this multiplication process, the mixer circuit typically includes one or more filters that filter out all signals other than the desired IF signal so that solely the desired IF signal is output by the mixer.
One common embodiment of a mixer circuit that is employed within many wireless communications devices is a double balanced mixer. Referring to FIG. 1 (Prior Art), a double balanced mixer 10 includes a RF input port 20, a LO input port 22, and a supply voltage port (Vref) 24. The RF input port 20 receives two RF signals from an antenna (not shown), while the LO input port 22 receives two LO signals provided by a LO circuit (not shown) that is within the wireless communications device. The two RF signals are inverted (i.e., 180 degrees out of phase) with respect to one another, as are the two LO signals. Typically, baluns (not shown) are employed to convert the single RF and LO signals that are respectively provided by the antenna and LO circuit into, respectively, the pair of RF signals that are inverted with respect to one another and the pair of LO signals that are inverted with respect to one another. The double balanced mixer 10 effectively multiplies the RF and LO signals provided at the RF and LO input ports 20, 22, respectively, to produce first and second intermediate signals at a pair of intermediate ports 26, 28, respectively. The intermediate signals at intermediate ports 26, 28 include IF components that are inverted with respect to one another such that, when the IF component of the first intermediate signal at intermediate port 26 is high, the IF component of the second intermediate signal at intermediate port 28 is low, and vice-versa. The operation of the double balanced mixer 10 is discussed further below with respect to FIG. 2.
The double balanced mixer 10 further includes (or is coupled to, depending upon how the mixer circuit is defined) an output stage 30, which processes the two intermediate signals at the intermediate ports 26, 28 to derive an IF output signal that is output at an IF output port 40. As shown in FIG. 1, it is known for the output stage 30 to include a transformer 32 having a first coil 34a and a second coil 34b, and to further include a capacitor 36 that is coupled in parallel with the first coil. The parallel combination of the first coil 34a and the capacitor 36 is connected between the two intermediate ports 26, 28, while the second coil 34b is coupled between ground and the IF output port 40. A tap 38 connected to the middle of the first coil 34a is coupled to an additional supply voltage port (V+) 39. The output stage 30 operates to combine or add the IF components of the first and second intermediate signals at intermediate ports 26, 28. Thus, the IF output signal provided at IF output port 40 has approximately double the amplitude of the IF components of the first and second intermediate signals at intermediate ports 26, 28 (assuming that the transformer 32 has an approximately 1:1 conversion ratio between coils 34a and 34b). For example, when the IF components of the first intermediate signal at intermediate port 26 is at its lowest value, the IF component of the second intermediate signal at intermediate port 28 is at its highest value such that the IF output signal at IF output port 40 is double the peak value of each of the IF components of the first and second intermediate signals.
In addition to deriving the IF output signal at IF output port 40 from the first and second intermediate signals at intermediate ports 26, 28, the output stage 30 has several additional purposes. First, the output stage 30 supplies DC power to each of the intermediate ports 26, 28 of the mixer 10 from supply voltage port 39 through tap 38 and first coil 34a. The DC power is necessary to properly bias the mixer 10 for its operation and to determine the mixer""s gain. Second, the output stage 30 provides desired AC impedance between the first and second intermediate ports 26, 28 and the IF output port 40. The AC impedance separates the desired IF signal component produced by the mixing operation of mixer 10 from the other signal components produced by the mixing operation, by filtering out those other signal components. Third, the transformer 32 of the output stage 30 buffers the IF output port 40 from the remainder of the mixer 10.
Although the conventional output stage 30 shown in FIG. 1 effectively filters the first and second intermediate signals and generates the IF output signal, and additionally provides the desired DC power to the mixer 10 and the desired buffering, the design of the conventional output stage is not conducive for implementation on an integrated circuit. In particular, the transformer 32 with its two coils 34a, 34b cannot be implemented effectively on an integrated circuit. Consequently, the conventional mixer 10 can only be partially incorporated on an integrated circuit insofar as at least part of the output stage 30 must be constructed from discrete circuit elements that are connected to the integrated circuit. Thus, the size and price of the conventional mixer 10 are greater than would might otherwise be the case if the entire output stage 30 was implementable on an integrated circuit.
Given that, as discussed above, it is generally desirable to reduce the size of the electronic circuitry of wireless communications devices and further desirable, in particular, to implement as much of the electronic circuitry on integrated circuits as possible, it would be desirable if a new double-balanced mixer could be designed that was completely implementable on an integrated circuit (or at least more nearly completely implementable than the conventional mixer 10). It would particularly be desirable if the new double-balanced mixer employed a new output stage which was constructed from components which were completely implementable on an integrated circuit (or more nearly completely implementable than the conventional output stage 30). It would further be desirable if the new output stage, despite its new design, was nonetheless capable of performing all of the key functions performed by the conventional output stage of the conventional mixer as described above.
The present inventors have recognized that the conventional output stage of a conventional double balanced mixer circuit can be replaced with a new output stage that includes an operational amplifier, an impedance element, and a pair of currents source devices, and is fully implementable on an integrated circuit. The new output stage filters undesired signal components from the first and second intermediate signals of the double-balanced mixer by way of the impedance element, and combines the IF components of the intermediate signals to obtain the IF output signal. Further, the pair of current source devices provide the required DC biasing of the remainder of the mixer circuit, and the operational amplifier provides the desired buffering of the IF output port from the remainder of the mixer circuit.
In particular, the present invention relates to an output stage of a double balanced mixer having a first intermediate port and a second intermediate port. The output stage includes an operational amplifier having a first input port, a second input port and an IF output port, and an impedance coupled between the first input port and the second input port. The output stage additionally includes a first current source device having a first terminal coupled to both the first input port and the first intermediate port, which are coupled to one another, and a second current source device having a second terminal coupled to both the second input port and the second intermediate port, which are coupled to one another.
The present invention further relates to a double balanced mixer that includes first and second transistors that respectively receive first and second RF input signals that are inverted with respect to one another, and third and fourth transistors that are both coupled to the first transistor and respectively receive first and second LO input signals that are inverted with respect to one another. The double balanced mixer further includes fifth and sixth transistors that are both coupled to the second transistor and respectively receive the second and first LO input signals, where the third and fifth transistors are further coupled to one another and to a first intermediate port, and where the fourth and sixth transistors are further coupled to one another and to a second intermediate port. The double balanced mixer additionally includes an output stage including an operational amplifier, an impedance coupled between a first input terminal and a second input terminal of the operational amplifier, a first current source device coupled to the first intermediate port and to the first input terminal of the operational amplifier, which are coupled to one another, and a second current source device coupled to the second intermediate port and to the second input terminal of the operational amplifier, which are coupled to one another. The operational amplifier outputs an IF signal related to a frequency difference between the RF input signals and the LO input signals.
The present invention additionally relates to a double balanced mixer that includes a means for mixing RF input signals with LO input signals to produce two intermediate signals with IF components that are inverted with respect to one another. The double balanced mixer further includes a means for converting the two intermediate signals into a single IF output signal to be provided at an output terminal, for biasing the means for mixing, for filtering out undesirable signal components from the two intermediate signals, and for buffering the output terminal from at least one element.
The present invention further relates to a method of converting an RF signal into an IF signal. The method includes providing a double balanced mixer including an output stage, where the output stage includes an operational amplifier, an impedance, and first and second current source devices, and where the first and second current source devices are coupled respectively to first and second input ports of the operational amplifier and to first and second intermediate parts of the double balanced mixer. The first and second input ports of the operational amplifier are also respectively coupled to the first and second intermediate ports. The method additionally includes providing the RF signal and an LO signal to the double balanced mixer, and mixing the RF signal and the LO signal to obtain two intermediate signals at the first and second intermediate ports, where the intermediate signals include IF components that are inverted with respect to one another. The method further includes filtering signal components that are not within a desired IF frequency range from the two intermediate signals, and providing the IF signal at an IF output port of the operational amplifier in response to the two intermediate signals, where the IF output port is buffered from the first and second intermediate ports by the operational amplifier.